Matrixpecker/Cache-Memory-Simulator
A Cache Memory Simulator that supports write through / write back and Direct mapped / 2-way associative. Several block replacement algorithms are also implemented (in C).
Verilog
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A Cache Memory Simulator that supports write through / write back and Direct mapped / 2-way associative. Several block replacement algorithms are also implemented (in C).
Verilog
No issues in this repository yet.