Experiments of the digital logic design laboratory course at university of Tehran.
MisaghM/Digital-Logic-Design-Lab-Experiments
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
VerilogMIT
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
VerilogMIT
Experiments of the digital logic design laboratory course at university of Tehran.