MisaghM/Digital-Logic-Design-Lab-Experiments
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
VerilogMIT
No issues in this repository yet.
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
VerilogMIT
No issues in this repository yet.