PrincetonUniversity/AutoSVA
AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made in the signal declaration section of an RTL module, generate liveness properties so that the module would eventually make forward progress.
PythonNOASSERTION
Stargazers
- amanocha
- Ashwin-RajeshIndian Institute of Science
- AugustNingNJ/NC
- Badboy1307
- bwtsengGICE, NTU.
- cbalint13Earth, MilkyWay, Laniakea
- dvtalk
- ekiwiCornell University
- GuzTechGuzTech
- Gy-HuThe Hong Kong University of Science and Technology
- huskyii@AMD
- jeanthomFrance
- jesseclinElan Microelectronics Corp.,
- katriinauk
- lifa123china
- likewiseSidebranch
- lucascavaliniUFPel
- lvyisu123
- lzxqaqChina
- MartoniArmadeus Systems
- MihailoIsakovBoolSi, Inc.
- nonamehi
- palubid
- pcwwgkg
- punzik
- RaamakrishnanChennai, India
- Readon
- samoyediii
- sequencerWuhan, China
- thiskappaisgreySan Francisco
- troyguoShanghai, China
- udif
- varung2
- wongwonder
- zarubafAxelera AI
- zsxpdsyz