RSPwFPGAs

RSPwFPGAs's Stars

• nanomsg/nanomsg

  nanomsg library

  Language:C6.1k4236791k

• lowRISC/ibex

  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  Language:SystemVerilog1.5k98852585

• m-labs/migen

  A Python toolbox for building complex digital hardware

  Language:Python1.3k64133214

• fpgasystems/fpga-network-stack

  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

  Language:C++7998538281

• Cr4sh/s6_pcie_microblaze

  PCI Express DIY hacking toolkit for Xilinx SP605. This repository is also home of Hyper-V Backdoor and Boot Backdoor, check readme for links and info

  Language:C771500158

• WukLab/LegoOS

  Disseminated, Distributed OS for Hardware Resource Disaggregation. USENIX OSDI 2018 Best Paper.

  Language:C485221775

• billfarrow/pcimem

  Simple program to read & write to a pci device from userspace

  Language:C320199116

• Apress/data-parallel-CPP

  Source code for 'Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems using C++ and SYCL' by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian (Apress, 2020).

  Language:CMake266192286

• embedeep/Free-TPU

  Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classification, detection, and segmentation problem.

  Language:Shell2539361

• TomG008/SkyNet

  Language:Python238101897

• butterstick-fpga/butterstick-hardware

  Basic ECP5 based GigE to SYZYGY interface.

  Language:HTML199201620

• enjoy-digital/pcie_screamer

  PCIe Screamer - TLPs experiments...

  Language:C174191033

• torokernel/torokernel

  This repository contains the source code of toro unikernel

  Language:Pascal1571148029

• datenlord/open-rdma

  RoCE v2 hardware and software implementation

  1458231

• texane/vpcie

  implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture

  Language:VHDL10212219

• wyvernSemi/pcievhost

  PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities

  Language:C9212421

• wutianze/dnndk-pynqz2

  First lesson for you to use DNNDK, also it can be helpful for your AI learning

  Language:Python6842028

• grg/parser-gen

  Network packet parser generator

  Language:Python519413

• stanford-ppl/spatial-multiverse

  Provides Spatial with front-end support from popular machine learning frameworks

  Language:Python331029

• vibhorvatsa/xv6-networking-stack

  A network stack implementation for xv6 OS

  Language:C30505

• datenlord/wavebpf

  High-performance eBPF implementation in hardware.

  Language:Scala27523

• fpgasystems/Centaur

  Centaur, a framework for hybrid CPU-FPGA databases

  Language:Verilog277011

• enjoy-digital/litex_vexriscv_smp_test

  VexRiscv-SMP integration test with LiteX.

  Language:Verilog25836

• AakashKT/CuckooHashingHLS

  HLS implementation of cuckoo hashing. Refer to paper : https://ieeexplore.ieee.org/document/7577355/

  Language:VHDL14255

• lastweek/fpga_icap_hls

  HLS-based Xilinx ICAP3 Controller (tested with VCU108)

  Language:Tcl1020

• lastweek/NVM-Emulator

  A kernel-level NVM emulator on bare-metal x86

  Language:C9222

• wzab/wzab-hdl-library

  This repository contains my small solutions related to HDL design.

  Language:VHDL6203

• Geontech/meta-ha1588

  Hardware Assisted 1588 Driver Layer

  Language:Assembly5413

• ajkhoury/s6_pcie_microblaze

  PCI Express DIY hacking toolkit for Xilinx SP605

  Language:C220

• HenryHu/xv6plus

  Automatically exported from code.google.com/p/xv6plus

  Language:Assembly1