Pinned Repositories
CHIP-KNN
[TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs
EASpiNN
HiSpMV
[FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS
pasta
[FCCM 2023] PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs
rodinia-hls
FPGA version of Rodinia in HLS C/C++
SASA
[TRETS 2023] SASA: A Scalable and Automatic Stencil Acceleration Framework
SERI
[FPL 2024] SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry using HBM-based FPGAs
SQL2FPGA
[FCCM'23] SQL2FPGA: Automatic Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms
SyncNN
[FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
uBench
[FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
SFU-HiAccel's Repositories
SFU-HiAccel/SyncNN
[FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
SFU-HiAccel/rodinia-hls
FPGA version of Rodinia in HLS C/C++
SFU-HiAccel/uBench
[FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
SFU-HiAccel/CHIP-KNN
[TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs
SFU-HiAccel/pasta
[FCCM 2023] PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs
SFU-HiAccel/HiSpMV
[FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS
SFU-HiAccel/SQL2FPGA
[FCCM'23] SQL2FPGA: Automatic Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms
SFU-HiAccel/SASA
[TRETS 2023] SASA: A Scalable and Automatic Stencil Acceleration Framework
SFU-HiAccel/EASpiNN
SFU-HiAccel/BitBlender
BitBlender is a scalable Bloom Filter accelerator, targeting FPGAs, written in TAPA High-Level Synthesis.
SFU-HiAccel/HLS-Tiny-Tutorials
SFU-HiAccel/haoda
Hardware-Aware Optimization and Design Automation
SFU-HiAccel/SERI
[FPL 2024] SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry using HBM-based FPGAs
SFU-HiAccel/spark-sql-perf
SFU-HiAccel/vivado-hls-broadcast-optimization
[DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
SFU-HiAccel/AutoSA
AutoSA: Polyhedral-Based Systolic Array Compiler
SFU-HiAccel/cs-259-19f
SFU-HiAccel/dblp-playground
Asking questions about DBLP
SFU-HiAccel/Deflate-HLS
SFU-HiAccel/FORC
[FPL 2024] FORC: A High-Throughput Streaming FPGA Accelerator for Optimized Row Columnar File Decoders in Big Data Engines
SFU-HiAccel/heterocl
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
SFU-HiAccel/HLS
Vitis HLS LLVM source code and examples
SFU-HiAccel/INSIDER-System
An FPGA-based full-stack in-storage computing system.
SFU-HiAccel/merlin-compiler
SFU-HiAccel/Sextans
An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
SFU-HiAccel/ThunderGP
HLS-based Graph Processing Framework on FPGAs
SFU-HiAccel/TopSort
SFU-HiAccel/tpch-spark
TPC-H queries in Apache Spark SQL using native DataFrames API
SFU-HiAccel/Vitis_Accel_Examples
Vitis_Accel_Examples
SFU-HiAccel/Vitis_Libraries
Vitis Libraries