/Digital_Logic_Design_Lab_Course_Projects

🎓💻University of Tehran Digital Logic Design Lab Course Projects - Spring 2021

Primary LanguageVerilog

Digital Logic Design Lab Course Projects

This repository contains my Digital Logic Design Lab course projects (Spring 2021) at University of Tehran.

  1. Lab1 : Clock and Periadic Signal Generation
  2. Lab2 : Clock Adjustment and Monitoring
  3. Lab3 : Function Generator
  4. Lab4 : Integrated System