Pinned issues
Issues
- 3
- 1
- 40
- 12
Roadmap / Contributing
#1 opened by Dolu1990 - 4
- 2
- 0
ti375 devkit litex debian demo
#24 opened by Dolu1990 - 5
Add memory access statistics to probe?
#25 opened by Jzjerry - 1
- 1
access more than 4GB address issue
#20 opened by zjin8520 - 6
reset-vector issue
#19 opened by zjin8520 - 7
- 1
RVF+cacheless LSU?
#18 opened by Jzjerry - 1
Ieee 754 floating point -> Just a gentle question: Is there any plan to integrate the floating-point operations from the VexiiRiscv project into the SpinalHDL library?
#17 opened by dreamflyings - 4
address width for xlen=64
#16 opened by zjin8520 - 1
Shallower Pipeline for VexiiRiscv?
#14 opened by Jzjerry - 2
- 4
Vexiiriscv instructions
#12 opened by ztachip - 10
- 1
Run a simple bare metal program?
#9 opened by nachiket - 7
『Help』The features that can be used on naxriscv are not available on the vexiiriscv framework
#6 opened by dreamflyings - 1
- 6
BuildBefore bug in plugin framework
#2 opened by dreamflyings