Pinned Repositories
aha
AhaM3SoC
SoC Based on ARM Cortex-M3
CGRAFlow
Integration test for entire CGRA flow
CGRAFlowDoc
Documentation for the entire CGRAFlow
doc
Papers, Posters, Presentations, Documentation...
garnet
Next generation CGRA generator
gemstone
Halide-to-Hardware
lake
Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory macros.
lassen
The PE for the second generation CGRA (garnet).
Stanford AHA! Agile Hardware Center's Repositories
StanfordAHA/garnet
Next generation CGRA generator
StanfordAHA/Halide-to-Hardware
StanfordAHA/aha
StanfordAHA/AhaM3SoC
SoC Based on ARM Cortex-M3
StanfordAHA/lake
Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory macros.
StanfordAHA/CGRAFlowDoc
Documentation for the entire CGRAFlow
StanfordAHA/doc
Papers, Posters, Presentations, Documentation...
StanfordAHA/lassen
The PE for the second generation CGRA (garnet).
StanfordAHA/CGRAFlow
Integration test for entire CGRA flow
StanfordAHA/gemstone
StanfordAHA/PowerDomainDesign
StanfordAHA/canal
StanfordAHA/CGRAMapper
CoreIR based mapping tool for CGRA
StanfordAHA/Applications
The applications for the Stanford AHA CGRA
StanfordAHA/onyx
StanfordAHA/chipyard
Pre-release starter template for custom Chisel projects
StanfordAHA/GarnetFlow
StanfordAHA/Primitives
Official Repo for keeping track of and defining all primitives.
StanfordAHA/aha-flow-app
StanfordAHA/amber-vde
StanfordAHA/Configuration
StanfordAHA/hammer_implementation_flow
StanfordAHA/aha-wiki-page
StanfordAHA/aha_tutorial
Aha Tutorial
StanfordAHA/amber_demo
JTAG/Python/M3 code for Amber demo
StanfordAHA/archipelago
StanfordAHA/clockwork
A polyhedral compiler for hardware accelerators
StanfordAHA/delta
StanfordAHA/GenClockTrials
Design with Generated Clocks
StanfordAHA/pdq