StanfordAHA/garnet

Issues

• Verilator option for regressions?

  #1087 opened 3 months ago by steveri
  9

• CAD problems related to recent r7->r8 upgrade.

  #1085 opened 4 months ago by steveri
  0

• Resnet dense layers FAIL unless preceded by e.g. gaussian test

  #1070 opened 8 months ago by steveri
  0

• Tapeout: PHY bump final routing report

  #543 opened 8 months ago by steveri
  1

• PD: well-tap / power-switch placement in mem tiles

  #923 opened 8 months ago by steveri
  1

• Unknown webhook 131214873

  #1065 opened 8 months ago by steveri
  0

• Buildkite "pe" and "top" webhooks should be deleted.

  #1064 opened 8 months ago by steveri
  1

• Buildkite "power" pipeline has reached end of life and should be deleted.

  #1063 opened 8 months ago by steveri
  1

• Magma-lang/mantle version

  #1037 opened a year ago by jiayi-wang98
  11

• Regression: type mismatch

  #1033 opened a year ago by bobcheng15
  0

• Fix/disable broken CI tests

  #951 opened 2 years ago by steveri
  1

• PD: Power domains break when PE features added

  #922 opened 2 years ago by steveri
  0

• PD: Cannot find RMUX cells during synthesis

  #900 opened 2 years ago by steveri
  12

• PD: glb_top silently failing LVS?

  #845 opened 3 years ago by steveri
  0

• PD: Scan regs appear out of thin air, prevent routing

  #833 opened 3 years ago by steveri
  5

• Remove systemRDL perl preprocessor script and directly install github instead.

  #481 opened 3 years ago by kongty
  0

• systemRDL support for CGRA units (tiles, interconnect)

  #492 opened 3 years ago by kongty
  0

• Move steps in `Makefile` in `global_buffer` into python script.

  #473 opened 3 years ago by kongty
  0

• PD: glb_tile routing fails silently if mem size too big.

  #801 opened 3 years ago by steveri
  0

• PD: GLB-tile routing track too small for 8-bank (256K) version

  #804 opened 3 years ago by steveri
  0

• PD: Nondeterminism in PE tile

  #803 opened 3 years ago by steveri
  0

• PD: Tile builds silently fail during final GLS step

  #791 opened 4 years ago by steveri
  3

• PD/CI: Innovus/QRC "detected slow or hanging jobs"

  #789 opened 4 years ago by steveri
  0

• RTL step failed silently

  #786 opened 4 years ago by steveri
  1

• dragonphy wants adk/multivt regardless of full_chip default view

  #752 opened 4 years ago by steveri
  1

• PD: Innovus fails in QRC

  #761 opened 4 years ago by steveri
  8

• PD: svdb directories too big

  #769 opened 4 years ago by steveri
  3

• Design: Global Buffer Test Checklist

  #424 opened 4 years ago by kongty
  1

• Cleanup filelist for global controller

  #485 opened 4 years ago by kongty
  1

• stalling during config seems to break things

  #534 opened 5 years ago by hofstee
  0

• Cannot configure the PE reg mode when it's stalled

  #536 opened 5 years ago by Kuree
  12

• Long RTL generation times

  #448 opened 5 years ago by alexcarsello
  9

• Tapeout: Better bumps

  #493 opened 5 years ago by steveri
  1

• Add register for stall signal at each io core

  #484 opened 5 years ago by kongty
  0

• Tapeout: bumps connect to "wrong" port on power pad(s)

  #462 opened 5 years ago by steveri
  0

• Tapeout: useless corner cell, rte net manipulations?

  #444 opened 5 years ago by steveri
  0

• coreir core dump during mem tile generation

  #428 opened 5 years ago by steveri
  11

• mflowgen: gdsmerge/outputs needs input from stdin?

  #418 opened 5 years ago by steveri
  1

• coreir/pycoreir requirements

  #417 opened 5 years ago by steveri
  10

• mflowgen: Makefile error is ignored

  #415 opened 5 years ago by steveri
  3

• magma/peak dependency problems in requirements.txt

  #414 opened 5 years ago by steveri
  3

• mflowgen: Scripts fail silently (ish) if GARNET_HOME not set

  #412 opened 5 years ago by steveri
  1

• Tapeout: Overlapping DTCD cells

  #408 opened 5 years ago by steveri
  0

• Tapeout: DTCD cell blockages cause DRC errors

  #407 opened 5 years ago by steveri
  0

• Tapeout: iphy pins tied to ground, why?

  #405 opened 5 years ago by steveri
  0

• Tapeout: Overlapping IO pads

  #399 opened 5 years ago by steveri
  0

• Tapeout: Final error check for Innovus

  #397 opened 5 years ago by steveri
  0

• Tapeout: M8 blockage across entire top of chip.

  #396 opened 5 years ago by steveri
  0

• Tapeout: Bottom-row ICOVL cells block power straps

  #395 opened 5 years ago by steveri
  0

• Tapeout: Tile_id straps cause DRC errors (M4CGRA)

  #394 opened 5 years ago by steveri
  0