twd_asic_processor
Project Hierarchy:
AsicWavelets_TB.vhd
AsicWavelets.vhd
DataPath.vhd
ResgisterNbits.vhd
ControlPath.vhd
Memory.vhd
Another files: tb_ControlPath.vhd tb_DataPath.vhd Util_package.vhd memoryContent.txt
This project was carried out for the discipline Integrating Digital Systems Project. It is a processor that does the non-orthogonal transform of haar into an input signal.
VHDL
Project Hierarchy:
AsicWavelets_TB.vhd
AsicWavelets.vhd
DataPath.vhd
ResgisterNbits.vhd
ControlPath.vhd
Memory.vhd
Another files: tb_ControlPath.vhd tb_DataPath.vhd Util_package.vhd memoryContent.txt