Pinned Repositories
bitfusion
Simulator for BitFusion
COFFE
pim-simulator
Simulator for the PIMRA project
vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
koios_proxy_benchmarks
Generate Synthetic Benchmarks for FPGA Research
ML4Accel-Dataset
Dataset for ML-guided Accelerator Design
tpu_like_design
This repo contains a parameterizable TPU-like design (in Verilog) that will be overlayed onto an FPGA (probably PYNQ). We plan to add this design to VTR to serve as a benchmark for FPGA architecture exploration.
tpu_v2
COFFE
vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
aman26kbm's Repositories
aman26kbm/pim-simulator
Simulator for the PIMRA project
aman26kbm/vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
aman26kbm/COFFE
aman26kbm/bitfusion
Simulator for BitFusion