annngineer

ASIC&FPGA design using VHDL/Verilog/SystemVerilog. Admire Python, smitten with DSP (Digital Signal Processing)

Pinned Repositories

grlib
GRLIB library from Gaisler
Language:VHDL11
hw_tester
Hardware tester based on GRLIB library and GDB debug concept
Language:Verilog11
gsp
grlib support package implemented in pure python for nmigen and cocotb backends
Language:Python20
nyanMigen
nyanMigen: pretty face for nMigen (https://github.com/nmigen/nmigen)
Language:Python20

annngineer's Repositories

annngineer/hw_tester
Hardware tester based on GRLIB library and GDB debug concept
Language:Verilog11
annngineer/grlib
GRLIB library from Gaisler
Language:VHDL11