anotherxx

anotherxx's Stars

• dmsc/my6502

  Verilog sources for simple 6502 computer.

  Language:C255

• klynch71/6502sim

  A near gate-level Verilog simulation of the 6502 microprocessor.

  Language:Verilog192

• MIPSfpga/digital-design-lab-manual

  Digital Design Labs

  Language:Verilog2419

• souhailbakhti/LC3-processor

  LC3 Architecture and Assembly codes Test

  41

• Arlet/verilog-6502

  A Verilog HDL model of the MOS 6502 CPU

  Language:Verilog33593

• yasnakateb/MIPSProcessor

  🔮 A 32-bit MIPS Processor Implementation in Verilog HDL

  Language:Verilog7

• arm-university/Introduction-to-SoC-Design-Education-Kit

  Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals

  Language:HTML11438

• tao-j/nexys3MIPSSoC

  A simple MIPS SoC implemented on Digilent Nexys3 board

  Language:Verilog81

• FilghtlessBird/SCCPU_v1

  This is a single cycle CPU whit Interrupt and Exception processing.

  Language:Verilog1

• phdavis1027/LC3Microarchitecture

  An implementation of the LC3 microarchitecture in Logisim

  1

• housq/lc3

  A computer using Little Computer 3 CPU written in verilog HDL. This CPU is designed according to APPENDIX C of INTRODUCING TO COMPUTING SYSTEMS.

  Language:Verilog71

• tsssni/mips-c5

  Design of a multi-circle MIPS CPU, supporting MIPS-C5 and interruption

  Language:Verilog2

• tilk/digitaljs

  Teaching-focused digital circuit simulator

  Language:JavaScript67349

• renyangang/riscv-mcu

  This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral circuit simulation. The goal is to support system boot, startup, operation, interrupt handling, peripheral control, and other functions.

  Language:Verilog367

• habibagamal/RISC-V-Implementation

  This is a Verilog Implementation of RISC-V CPU that implements RV32I and RV16I and supports interrupt handling and some CSR instuctions and registers

  Language:Verilog52

• shrirangpdeshmukh/32-bit-processor-logisim

  Mini Project | Designing a 32-bit RISC processor in logisim.

  21

• kaitoukito/Computer-Science-Textbooks

  Collect some CS textbooks for learning.

  718201

• TeflonAntihaft/ARMv7-Logisim

  ARMv7 Single-Cycle processor implementation in Logisim

  101

• prosenjitjoy/4-bit-PC

  Proteus implementation of 4 bit PC

  1

• eBernalZ/8bcpu

  8-bit CPU developed with Logisim

  1

• prp-e/8bitcomputer

  A simple, 8 bit computer

  Language:Ruby3

• iryont/AVR-OS

  Small operating system for AVR microcontrollers

  Language:C228

• FreeRTOS/Lab-Project-FreeRTOS-POSIX

  This repository contains FreeRTOS+POSIX source code, which could be consumed as a submodule.

  Language:C10763

• amyjko/whyline

  The Whyline for Java, an interactive debugging tool that lets you ask "why" questions about program out.

  Language:Java7613

• arneph/Katara

  SSA-based JIT Compiler - A personal project inspired by college courses on compilers

  Language:C++104

• betterenvi/Compiler-DFA-SSA

  Data Flow Analysis and Static Single Assignment

  Language:C285

• elvin-du/tinyscript

  自制的一个编译器， 用于学习，完整实现了词法分析，语法分析，中间代码（SSA）生成，机器码生成，和基于寄存器的虚拟机

  Language:Go23032

• duasynt/gdb_scripts

  Language:Python562

• AlanSwift/shinaCC

  Yet Another Compiler for C

  Language:C++82

• dhcpack/BUAA_Compiler_2022

  BUAA 2022 Autumn Compiler

  Language:Java41