arsenykrasnov's Stars
jankapunkt/latexcv
:necktie: A collection of cv and resume templates written in LaTeX. Leave an issue if your language is not supported!
alexforencich/verilog-ethernet
Verilog Ethernet components for FPGA implementation
ssloy/tinyraycaster
486 lines of C++: old-school FPS in a weekend
pConst/basic_verilog
Must-have verilog systemverilog modules
analogdevicesinc/hdl
HDL libraries and projects
cirosantilli/cpp-cheat
MOVING TO: https://github.com/************/linux-kernel-module-cheat#userland-content SEE README. C, C++, POSIX and Linux system programming minimal examples. Asserts used wherever possible. Hello worlds for cool third party libraries and build systems. Cheatsheets, tutorials and mini-projects. 移至:https://github.com/************/linux-kernel-module-cheat#userland-content查看自述文件。 C,C ++,POSIX和Linux系统编程的最少示例。 尽可能使用断言。 酷第三方库和构建系统的世界。 备忘单,教程和小型项目。
codez0mb1e/resistance
Pre-crisis Risk Management for Personal Finance
daveruiz/doom-nano
A 3d raycast engine for Arduino
eez-open/modular-psu
EEZ Bench Box 3 (BB3) Modular T&M chassis
fabiensanglard/Chocolate-Wolfenstein-3D
RudolphRiedel/FT800-FT813
Multi-Platform C code Library for EVE graphics controllers from FTDI / Bridgetek (FT810, FT811, FT812, FT813, BT815, BT816, BT817, BT818)
philipempl/modern-latex-cv
A professional and modern CV in LaTex
ShironekoBen/superrt
A realtime raytracing extension chip for the SNES
ghidraninja/game-and-watch-doom
fragglet/miniwad
Minimalist Doom IWAD
azonenberg/antikernel-ipcores
FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
hypernyan/eth_vlg
MaartenBaert/alterpcb-tlinesim
An open-source, cross-platform transmission line simulation tool.
sinara-hw/RFSOC-AMC
AMC module with Xilinx RF-SoC and two analog front-end mezzanines for SDR and quantum applications
vpoupet/wolfenstein
A Javascript rewriting of the Wolfenstein 3D engine
hgomersall/Ovenbird
A tool for merging the MyHDL workflow with Vivado
mikef5410/Altium_PassiveSMT_DbLib
Lots of SMT (chip) resistors, capacitors, and inductors for Altium in the form of a DbLib
esynr3z/pyhdlsim
Example of Python and PyTest powered workflow for a HDL simulation
hellgate202/crc_calc
Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
SheepyChris/quickcg-sdl2
A port of Lode's QuickCG library to SDL 2.0.
hypernyan/hdl_generics
Generic HDL components to be used in different projects
dormando/tinyfpga-raycaster
Wolf3D style raycasting engine for Arduino + TinyFPGA BX
jimmyswimmy/AltiumDesignerLibrary
A web frontend for managing an Altium Designer parts database using a SVNDBLib
sinara-hw/RFSOC_SAWG
RFSOC-based SAWG in EEM form factor
hypernyan/modbus_rtu_slave_hdl
A SystemVerilog implementation of Modbus RTU Slave