chipsalliance/Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
C++Apache-2.0
Stargazers
- A1exSt
- abunimeh@slaclab
- amal-khailtash
- bluecmdStockholm, Sweden
- bsp13
- chwise
- cuijialang
- drom@sifive
- EverythingElseWasAlreadyTaken
- GregACBristol, UK
- guanzhiyong1976
- hongguiShanghai
- hzellerSan Francisco
- IntuityBristol, UK
- kammoh@GMUCERG
- kaoruzhu1NONE
- kbieganski@antmicro
- kiteloopdesignSpain
- linhuan112Shenzhen
- lionheart117
- luuvishSeoul, Korea
- Meuhor
- mohamedRenesas
- nonamehi
- phsilvaFlieber
- pistoletpierre
- raulbehl
- rdburns
- renauUCSC
- RonxBulld
- seabeam
- skyee
- sommerlukas@codeplaysoftware
- varunnagpaal
- vicshen
- zhuzhzhshanghai