chipsalliance/riscv-dv

CRITICAL Cannot randomize branch target instruction

thewesley77 opened this issue · 1 comments

I have been unsuccessful at generating any test in the base test list other than the 'riscv_arithmetic_basic_test'. Most of the test that I try get a CRITICAL issue in the log file and cause the program to hang and does not produce a ASM file. In this example I ran the command:

python3 run.py --test=riscv_loop_test --simulator=pyflow --steps gen --target rv32i

But it never finished and when I checked the log file I see the following error for the riscv_loop_test:

2023-03-26 23:33:44,788 riscv_asm_program_gen.py 1130 INFO Adding directed instruction stream:riscv_loop_instr ratio:20/
1000
2023-03-26 23:33:44,788 riscv_instr_base_test.py 70 INFO All directed instruction is applied
2023-03-26 23:33:44,789 riscv_asm_program_gen.py 614 INFO Generating privileged mode routing for MACHINE_MODE
2023-03-26 23:33:44,805 riscv_privileged_common_seq.py 139 INFO self.mstatus_val: 0x1e00
2023-03-26 23:33:44,881 riscv_asm_program_gen.py 1164 INFO Insert directed instr stream riscv_loop_instr 60/3042 times
2023-03-26 23:33:45,229 riscv_loop_instr.py 202 CRITICAL Cannot randomize branch target instruction

Do I have something wrong with the command or the install that is causing the other tests to take these critical issues?

Thanks
Chris

I've managed to reproduce the issue and am looking into possible fixes