damdoy/ice40_ultraplus_examples
Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
VerilogMPL-2.0
Issues
- 2
- 2
Use of your examples
#10 opened by HurleyResearch - 3
example led can't be build
#7 opened by quantrpeter - 1
make prog not work
#9 opened by quantrpeter - 1
Example spi_hw does not work
#6 opened by 71GA - 4
Clarification of "make prog" vs "make prog_flash" and the J6 header on the board.
#3 opened by secworks - 1
Add link to README in riscv subdir
#4 opened by secworks - 1
Radiant
#2 opened by deekshakondiudayashankar - 8
Testbench
#1 opened by Deeksha-k-udayshankar