Pinned Repositories
async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
axi-crossbar
An AXI4 crossbar implementation in SystemVerilog
bster
Implementation of a binary search tree algorithm in a FPGA/ASIC IP
cdc
Repository gathering basic modules for CDC purpose
friscv
RISCV CPU implementation in SystemVerilog
meduram
Multi-port BRAM IP for ASIC and FPGA
svlogger
SystemVerilog Logger
svut
SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
vim-leader-mapper
Vim plugin to create visual leader key menu
zsh-quotify
A Zsh plugin printing coding quotes or haiku on startup
dpretet's Repositories
dpretet/async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
dpretet/axi-crossbar
An AXI4 crossbar implementation in SystemVerilog
dpretet/svut
SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
dpretet/vim-leader-mapper
Vim plugin to create visual leader key menu
dpretet/friscv
RISCV CPU implementation in SystemVerilog
dpretet/bster
Implementation of a binary search tree algorithm in a FPGA/ASIC IP
dpretet/svlogger
SystemVerilog Logger
dpretet/meduram
Multi-port BRAM IP for ASIC and FPGA
dpretet/zsh-quotify
A Zsh plugin printing coding quotes or haiku on startup
dpretet/chacha20
Chacha20 Implementation in SystemVerilog for FPGA and ASIC
dpretet/dotfiles
Zsh, Vim & Tmux dotfiles
dpretet/vim-veritoolbox
Vim plugin to work easier with Verilog & SystemVerilog
dpretet/chacha20.c
Basic implementation of Chacha2 algorithm in C
dpretet/pool_arena.c
Pool arena implementation
dpretet/vim-cheatsheet
Cheatsheet trying to gather the essential of Vim as an editing language
dpretet/ascend-freepdk45
A free standard cell library for SDDS-NCL circuits
dpretet/autofpga
A utility for Composing FPGA designs from Peripherals
dpretet/blog
The Critical Path - a rambly FPGA blog
dpretet/dark-tech
dpretet/nng
nanomsg-next-generation -- light-weight brokerless messaging
dpretet/nvim-lspconfig
Quickstart configurations for the Nvim LSP client
dpretet/swift_udemy_course
dpretet/symbolator
HDL symbol generator
dpretet/ufldl-mlnn-tutorial
UFLDL Tutorial - Multi layer neural network tutorial
dpretet/vcd
dpretet/verible
Verible provides a SystemVerilog parser, style-linter, and formatter.
dpretet/vim-commenter
Basic Vim / Neovim comment plugin, working on current line or on visual selection
dpretet/vim-markdown-tool
Markdown plugin for Vim provide facilities to write docs.
dpretet/wb2axip
Bus bridges and other odds and ends
dpretet/XRT
Xilinx Run Time for FPGA