farukyld/sort-circuit
an RTL circuit that sorts the integer values in a momory unit connected with (almost) AXI-Lite
Verilog
Issues
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Add Information into README File About How to Experiment with the Verilog Codes
#55 opened by farukyld - 0
Test Verilog Codes
#53 opened by farukyld - 0
Write Verilog Codes
#50 opened by farukyld - 2
test and fix bugs in the circuits
#45 opened by farukyld - 1
- 3
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Implement an AXI-Lite Write Submodule
#32 opened by farukyld - 0
Implement a Memory Filler
#31 opened by farukyld - 5
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Create the State Table
#13 opened by farukyld - 2
Implement Datapath
#15 opened by farukyld - 3
Implement the Controller
#16 opened by farukyld - 0
Add Internal Control Signals and Register to Handle Return State to the Controller
#21 opened by farukyld - 0
- 1
Implement the Controller and the Datapath
#5 opened by farukyld - 1
Draw the State Diagram of the HLSM
#2 opened by farukyld - 1
Draw the State Diagram of the FSM
#3 opened by farukyld - 4
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Write C Code
#1 opened by farukyld