jminjares4/Digital-System-2

Digital System 2 Lab

Digital-System-2

This repository will contain the lab for Digital System 2. The lab will be developed using Verilog and Xilinx Vivado.

Table of Content

1. Lab 1 XOR implemented with NAND gates
2. Lab 2 Hexadecimal Full Adder
3. Lab 3 ASM implementation using Xilinx ISE HAWK

Author:

• Jesus Minjares
  
  • Master of Science in Computer Engineering