/fpga_readings

Recipe for FPGA cooking

Primary LanguageVerilogApache License 2.0Apache-2.0

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Updates

07/14/2021:

Just a couple thoughts I want to share.

This repo has not been updated for a while. Although I'm still collecting FPGA pages in my own Zotero, I haven't added them here. Also, I no longer use Xilinx HLS as my main development language. I started using Scala-based languages such as SpinalHDL and Chisel (mostly SpinalHDL). I think they are very expressive, practical, and fit the hardware model very well. And they have been used across many successful projects (e.g., Xiangshan, BOOM, etc).

Xilinx HLS still has its place in Industy, at least for now. Google's latest Video Processing Unit (ASPLOS'21) is designed using HLS. They praise for HLS's C++ model, hence able to enjoy a lot language sanity checking. I guess they must have a set of good HLS practices to make it work.

Also, if you are into network-related processing, go checkout the Corundum.io project. In fact, check out all the projects from Alex Forencich. Dude is a lengend in the open-source FPGA world, he is making such a big impact on the whole research community.

FPGA has never been so hot for system researchers. People are using it to build various things, prototyping for ASIC etc. It aids networking, storage, machine learning. With those high-quality open-source RISC-V cores, network stack and so on, sky is the limit.

Everyone is welcomed to contribute. You can add new papers, new code, new practice lessons, and so on.

Cook FPGA

This repository is intended for folks who are new and want to learn something about FPGA. This repository is a collection of useful resources and links rather than a thorough FPGA tutorial. Traditional HDL (Hard and Difficult Language) is not the main focus, instead, we focus on using high-level languages (e.g., C++) to cook FPGA.

Originally, this repository was started by a newbie to record his learning of FPGA, and late made public in the hope that it could help researchers to start their journey along with FPGA, with less pain and whiskey.

Resources collected here, or the way contents are organized, are not in their perfect shape. This repository is still raw and need major improvements. Any form of contribution is welcomed and appreciated.

Main contents:

  • README.md
    • Basics about Digital Design
    • Basics about FPGA
    • Relevant Courses and Books
    • Papers about FPGA internal
  • Xilinx
    • xilinx.md
    • xilinx_constraints.md
    • xilinx_cheatsheet.md
    • xilinx_lessons_vivado.md
    • xilinx_lessons_hls.md
  • submodules/: Github repositories about FPGA
  • hls/: Sample Xilinx HLS C++ code
    • AXI Stream
    • Network protocol processing
  • xilinx_arty_a7: Sample Xilinx projects for Arty A7 100 board
    • Tri-mode MAC reference design
    • Simple LED
    • Clocked LED
  • FAQ.md
    • Some implementation questions about FPGA

Resources

Papers

List of academic papers.

FPGA Intro

Digital Basics

Verilog

High-Level Synthesis (HLS)

Courses

Books