lvtoto's Stars
ohmyzsh/ohmyzsh
🙃 A delightful community-driven (with 2,400+ contributors) framework for managing your zsh configuration. Includes 300+ optional plugins (rails, git, macOS, hub, docker, homebrew, node, php, python, etc), 140+ themes to spice up your morning, and an auto-update tool that makes it easy to keep up with the latest updates from the community.
NARKOZ/hacker-scripts
Based on a true story
koalaman/shellcheck
ShellCheck, a static analysis tool for shell scripts
junegunn/vim-plug
:hibiscus: Minimalist Vim Plugin Manager
open-mmlab/mmdetection
OpenMMLab Detection Toolbox and Benchmark
openssl/openssl
TLS/SSL and crypto library
preservim/nerdtree
A tree explorer plugin for vim.
vim-airline/vim-airline
lean & mean status/tabline for vim that's light as air
tmux-plugins/tpm
Tmux Plugin Manager
airblade/vim-gitgutter
A Vim plugin which shows git diff markers in the sign column and stages/previews/undoes hunks and partial hunks.
YosysHQ/yosys
Yosys Open SYnthesis Suite
lowRISC/opentitan
OpenTitan: Open source silicon root of trust
donnyyou/torchcv
TorchCV: A PyTorch-Based Framework for Deep Learning in Computer Vision
andymass/vim-matchup
vim match-up: even better % :facepunch: navigate and highlight matching words :facepunch: modern matchit and matchparen. Supports both vim and neovim + tree-sitter.
Xilinx/Vitis-Tutorials
Vitis In-Depth Tutorials
kplcloud/kplcloud
基于Kubernetes的PaaS平台
vhda/verilog_systemverilog.vim
Verilog/SystemVerilog Syntax and Omni-completion
troyguo/awesome-dv
Awesome ASIC design verification
courageheart/AMBA_APB_SRAM
AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).
uavs3/uavs3e
AVS3 encoder which supports AVS3-P2 baseline profile.
zhajio1988/Open_RegModel
:hatched_chick:Use ORDT and systemRDL tools to generate C/Verilog header files, register RTL, UVM register models, and docs from compiled SystemRDL.
zion-group/VerilogCodingStyle
SystemRDL/PeakRDL-uvm
Generate UVM register model from compiled SystemRDL input
SystemRDL/PeakRDL-html
Generate address space documentation HTML from compiled SystemRDL input
seabeam/yuu_register_productor
UVM register utility generation by inputting xls table
zhuzhzh/verilog_emacsauto.vim
verilog filetype plugin to enable emacs verilog-mode autos
MichaelMelkor/Vivado_Batch_Mode_Tool
A tool for those who want to use Vivado's batch mode more easily
xiaochuang-lxc/AMBA-SVA
ARM AMBA 4 AXI4,AXI4-lite,AXI4-stream SVAs (BP063) MiscellaneousBP063
nirajnsharma/BSV-Programming-Assignment
BSV Programming Assignments for new BSV users
vhda/DirDiff.vim
A plugin to diff and merge two directories recursively.