/Xilinx-DPUV3.0-Vivado-Proj

Deep Learning Processing Unit (DPU IP) integration with Application Processing Unit (APU) using (Zynq-7000 PS) in Xilinx Vivado Design Suite

Primary LanguageVHDL

Xilinx-DPUV3.0-Vivado-Proj

DPU integration with APU (Zynq-7000 PS) in Xilinx Vivado Design Suite