mohammadasim98/Xilinx-DPUV3.0-Vivado-Proj
Deep Learning Processing Unit (DPU IP) integration with Application Processing Unit (APU) using (Zynq-7000 PS) in Xilinx Vivado Design Suite
VHDL
Issues
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DPU v3.0
#2 opened by luminita02 - 1
dpu IP
#1 opened by huanghuan1