mustafabbas

Pinned Repositories

ECE1373_2016_hft_on_fpga
High Frequency Trading using Vivado HLS
Language:Verilog109 5 231
lid_for_fpgas
Parameterizable latency insensitive Design Styles for FPGAs
Language:SystemVerilog3 1 02
vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Language:C++998 68 996385

mustafabbas's Repositories

mustafabbas/ECE1373_2016_hft_on_fpga
High Frequency Trading using Vivado HLS
Language:Verilog109 5 231
mustafabbas/lid_for_fpgas
Parameterizable latency insensitive Design Styles for FPGAs
Language:SystemVerilog3 1 02