myzinsky

myzinsky's Stars

• facebookresearch/encodec

  State-of-the-art deep learning based audio codec supporting both mono 24 kHz audio and stereo 48 kHz audio.

  Language:Python3.3k5870298

• gem5/gem5

  The official repository for the gem5 computer-system architecture simulator.

  Language:C++1.5k712681.1k

• jameslzhu/riscv-card

  An unofficial assembly reference for RISC-V.

  Language:TeX434181355

• cjdrake/pyeda

  Python EDA

  Language:Python2992217256

• mentalDetector/Quansheng_UV-K5_PCB_R51-V1.4_PCB_Reversing_Rev._0.9

  Reverse engineering of the Quansheng UV-K5 V1.4 PCB in KiCad 7

  25713361

• intel/systemc-compiler

  This tool translates synthesizable SystemC code to synthesizable SystemVerilog.

  Language:C++232165936

• DJ2LS/FreeDATA

  A free, open-source, multi-platform application for sending files and messages, using the codec2 HF modems

  Language:Python1331134617

• classabbyamp/espresso-logic

  A modern (2017) compilable re-host of the Espresso heuristic logic minimizer.

  Language:C1197136

• machineware-gmbh/vcml

  A modeling library with virtual components for SystemC and TLM simulators

  Language:C++11191732

• etherkit/JTEncode

  JT65/JT9/JT4/WSPR/FSQ Encoder Library for Arduino

  Language:C++97152133

• DG1JAN/UniBalun

  a PCB for a lightweight qrp Balun (1:1, 1:4 or UnUn 1:49)

  84945

• Minres/SystemC-Components

  A SystemC productivity library: https://minres.github.io/SystemC-Components/

  Language:JavaScript8192721

• M17-Project/Module_17

  M17 modem board for 9600-baud capable radios

  Language:HTML79151517

• g4eml/Langstone

  Langstone. An SDR Transceiver for the VHF, UHF and Microwave bands.

  Language:C5916920

• wavelog/wavelog

  Webbased Amateur Radio Logging Software - Log your contacts from everywhere!

  Language:PHP5495118

• oprecomp/DDR4_controller

  Language:SystemVerilog408011

• M17-Project/Mini17

  Mini17 - QRP M17 handheld

  372216

• M17-Project/OpenHT-fpga

  OpenHT FPGA design

  Language:Verilog28466

• gtjennings1/UPDuino_v1_0

  UPDuino v1.0 - PCB Design Files, Designs, Documentation

  20739

• synogate/gatery

  Gatery, a library for circuit design.

  Language:C++17605

• icssw-org/MeshCom-Firmware

  MeshCom Client 4.0

  Language:C++13623

• illdefined/cloudlog-adifwatch

  Automatic upload of ADIF log to CloudLog

  Language:Rust12441

• Minres/SCViewer

  Online documentation can be found at https://minres.github.io/SCViewer/

  Language:Java12221

• timsee/QtMobileShareUtils

  A Qt-based solution for accessing Android Intents and iOS shares for sending and receiving files.

  Language:Java9111

• ge0rg/callsign-regex

  Amateur Radio Callsign RegEx Generator

  Language:Python8201

• DARC-e-V/50ohm-pocket

  Language:Dart71

• DG1JAN/AntennaPlayground

  a collection of antenna related designs (mostly based on the UniBalun Project)

  720

• wavelog/WaveLogGate

  WLGate, the CAT-Bridge for WSJT-* and FLRig to Wavelog

  Language:JavaScript5512

• DF3LX/Numbers-Station-Simulator

  Simple Python application that tries rudimentary to simulate a numbers station

  Language:Python2

• s0561774/AudienceResponseSystem

  Bachelorarbeit

  Language:HTML110