myzinsky

myzinsky's Stars

• facebookresearch/encodec

  State-of-the-art deep learning based audio codec supporting both mono 24 kHz audio and stereo 48 kHz audio.

  Language:Python3.5k5771305

• gem5/gem5

  The official repository for the gem5 computer-system architecture simulator.

  Language:C++1.7k713531.3k

• jameslzhu/riscv-card

  An unofficial assembly reference for RISC-V.

  Language:TeX458181357

• cjdrake/pyeda

  Python EDA

  Language:Python3112217756

• mentalDetector/Quansheng_UV-K5_PCB_R51-V1.4_PCB_Reversing_Rev._0.9

  Reverse engineering of the Quansheng UV-K5 V1.4 PCB in KiCad 7

  30515467

• intel/systemc-compiler

  This tool translates synthesizable SystemC code to synthesizable SystemVerilog.

  Language:C++251176036

• dante-ev/latex-action

  :octocat: GitHub Action to compile LaTeX documents

  Language:TeX17721925

• wavelog/wavelog

  Webbased Amateur Radio Logging Software - Log your contacts from everywhere!

  Language:PHP1561316340

• DJ2LS/FreeDATA

  A free, open-source, multi-platform application for sending files and messages, using the codec2 HF modems

  Language:Python1501241919

• machineware-gmbh/vcml

  A modeling library with virtual components for SystemC and TLM simulators

  Language:C++135101835

• classabbyamp/espresso-logic

  A modern (2017) compilable re-host of the Espresso heuristic logic minimizer.

  Language:C1327138

• etherkit/JTEncode

  JT65/JT9/JT4/WSPR/FSQ Encoder Library for Arduino

  Language:C++98152233

• Minres/SystemC-Components

  A SystemC productivity library: https://minres.github.io/SystemC-Components/

  Language:JavaScript9792826

• DG1JAN/UniBalun

  a PCB for a lightweight qrp Balun (1:1, 1:4 or UnUn 1:49)

  95967

• M17-Project/Module_17

  M17 modem board for 9600-baud capable radios

  Language:HTML92161918

• g4eml/Langstone

  Langstone. An SDR Transceiver for the VHF, UHF and Microwave bands.

  Language:C5816920

• oprecomp/DDR4_controller

  Language:SystemVerilog488013

• M17-Project/OpenHT-fpga

  OpenHT FPGA design

  Language:Verilog31466

• gtjennings1/UPDuino_v1_0

  UPDuino v1.0 - PCB Design Files, Designs, Documentation

  21839

• icssw-org/MeshCom-Firmware

  MeshCom Client 4.0

  Language:C++196126

• synogate/gatery

  Gatery, a library for circuit design.

  Language:C++17605

• Minres/SCViewer

  Online documentation can be found at https://minres.github.io/SCViewer/

  Language:Java14221

• wavelog/WaveLogGate

  WLGate, the CAT-Bridge for WSJT-* and FLRig to Wavelog

  Language:JavaScript13674

• illdefined/cloudlog-adifwatch

  Automatic upload of ADIF log to CloudLog

  Language:Rust12441

• ge0rg/callsign-regex

  Amateur Radio Callsign RegEx Generator

  Language:Python10202

• DARC-e-V/50ohm-pocket

  Language:Dart96314

• DG1JAN/AntennaPlayground

  a collection of antenna related designs (mostly based on the UniBalun Project)

  9200

• timsee/QtMobileShareUtils

  A Qt-based solution for accessing Android Intents and iOS shares for sending and receiving files.

  Language:Java9111

• DF3LX/Numbers-Station-Simulator

  Simple Python application that tries rudimentary to simulate a numbers station

  Language:Python2100

• s0561774/AudienceResponseSystem

  Bachelorarbeit

  Language:HTML110