intel/systemc-compiler
This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
C++NOASSERTION
Issues
- 1
- 2
- 2
Confusing line in getting started guide.
#71 opened by sborisov-int - 5
sys::CleanupOnSignal error
#58 opened by drom - 0
Clang/LLVM 14 support
#33 opened by mikhailmoiseev - 0
Clang/LLVM 13 support
#32 opened by mikhailmoiseev - 3
- 13
How to get SystemC IR information?
#64 opened by megleo - 7
- 1
- 1
Signals stuck at X
#69 opened by pmerz1 - 9
Error when building ICSC in Debug mode
#46 opened by Milemarco - 0
Report error for side-effect in assertions, cout and other service functions
#40 opened by mikhailmoiseev - 1
Documentation detailing thread generation process
#51 opened by rseac - 5
export SystemVerilog modules to multiple files?
#68 opened by pmerz1 - 2
- 3
- 8
Can tlm interfaces be used?
#36 opened by orichal - 4
- 6
CMake Error at CMakeLists.txt:28 (svc_target): Unknown CMake command "svc_target".
#60 opened by songlinli0803 - 0
CMake Error at CMakeLists.txt:107 (install): install FILES given no DESTINATION!
#59 opened by songlinli0803 - 1
Remove unused register declaration and initialization in always_ff reset section
#57 opened by mikhailmoiseev - 1
- 1
Clarification of 7.1 Memory wrapper
#55 opened by xlef13 - 1
Operation
#56 opened by Halaswamihs - 2
Using nested Record leads to ambigious error
#50 opened by xlef13 - 2
Ambiguous operator <<
#54 opened by isv75 - 1
CMakeLists.txt overwritten
#53 opened by isv75 - 2
Header cassert not found
#52 opened by isv75 - 7
Record Type Object errors
#48 opened by Milemarco - 5
build.sh removal intentional ?
#49 opened by dlmiles - 2
Record copy constructor not supported yet
#25 opened by mikhailmoiseev - 2
- 12
Assertion signal stable value
#39 opened by Risto97 - 10
segfault when trying to synthesize
#43 opened by Milemarco - 4
Connecting SystemC compiler to open source ASIC/FPGA tooling and demo with Google's Skywater PDK?
#18 opened by mithro - 2
Examples dvcon20 fifo not working as expected
#42 opened by nico1507 - 1
Support function call in SCT_ASSERT
#28 opened by mikhailmoiseev - 1
Move in-reset assertions into IF branch
#27 opened by mikhailmoiseev - 3
multiple level mif array cause error
#23 opened by jinjie320621 - 1
- 4
Question regarding missing SystemC features
#21 opened by maubri - 1
Support sc_bv type
#35 opened by mikhailmoiseev - 3
const parameter can not support sc_biguint
#13 opened by jinjie320621 - 3
Primitive channel
#20 opened by Spoorthy-Siddannaiah - 6
subtraction and left side assignment
#16 opened by mzau - 6
Is there any intermediate code similar to AST generation during conversion to SystemVerilog
#17 opened by hcy719 - 2
Multiple assignments in C
#15 opened by mzau - 3
- 2