Risto97

CERNGeneva, Switzerland

Pinned Repositories

SoCMake
CMake based hardware build system
Language:CMake8 1 432
ad9850_rpi
AD9850 CLI and GUI application for RaspberryPi
Language:C++3 6 14
cascade_classifier
Python, C, RTL implementation of Viola Jones cascade classifier, using pretrained model from opencv.
Language:Python2 2 01
linux_setup
Language:Python1 3 00
PeakRDL-halcpp
C++ 17 Hardware abstraction layer generator from systemrdl
Language:C++11 2 05
PeakRDL-opentitan
SystemRDL <-> Opentitan regtool hjson format exporter, importer
Language:Python51
pygears-uvm
SystemC UVM environment generator for PyGears components. RTL simulated with Verilator
Language:C++5 2 13
systemc_uvm_verilator
Language:C++11 1 00
VeriSC
SystemC UVM verification environment with Constraint Randomized stimulus, Coverage, Assertions
Language:CMake18 2 11
zturn_linux
Building linux kernel and u-boot for MYIR Z-Turn 7020 Zynq Board
Language:Tcl10 2 17

Risto97's Repositories

Risto97/VeriSC
SystemC UVM verification environment with Constraint Randomized stimulus, Coverage, Assertions
Language:CMake18 2 11
Risto97/PeakRDL-halcpp
C++ 17 Hardware abstraction layer generator from systemrdl
Language:C++11 2 05
Risto97/systemc_uvm_verilator
Language:C++11 1 00
Risto97/PeakRDL-opentitan
SystemRDL <-> Opentitan regtool hjson format exporter, importer
Language:Python51
Risto97/ESP32-2432S022_lvgl_example
Language:C++10
Risto97/lecroy_dso
Simple library to get some measurements from lecroy oscilloscope over PyVisa
Language:Python1 1 0
Risto97/linux_setup
Language:Python1 3 00
Risto97/systemc-ams
SystemC-AMS fork
Language:C++1 1 02
Risto97/vrpark_remap
Remapping app for cheap Aliexpress joystick modules to be used with Kodi or other player
Language:Python1 1 0
Risto97/apb_crc_uvm_socmake
Language:C++
Risto97/awesome-opensource-hardware
List of awesome open source hardware tools, generators, and reusable designs
Language:Python
Risto97/CMakeTest
A unit-testing framework for CMake functions
Language:CMake0 0
Risto97/Cores-VeeR-EL2
VeeR EL2 Core
Language:SystemVerilog0 0
Risto97/crave
Constrained random stimuli generation for C++ and SystemC
Language:C++
Risto97/dependencies
Language:Shell0 0
Risto97/metaSMT
Risto97/mini-gdbstub
Fork with Cmake files
Language:C0 0
Risto97/PeakRDL-regblock
Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
Language:Python0 0
Risto97/picorv32_socmake
PicoRV32 - A Size-Optimized RISC-V CPU
Language:Verilog
Risto97/pulp_soc
Risto97/SoCMake
Build system for RTL and SoC designs
Language:CMake1 0
Risto97/stanford_cg635_gpib
PyVisa GPIB class for stanford CG635 clock generator
Language:Python
Risto97/svuvm-socmake
SystemVerilog UVM SoCMake package
Language:CMake
Risto97/systemc-compiler
This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
Language:C++0 0
Risto97/systemrdl-compiler
SystemRDL 2.0 language compiler front-end
Language:Python
Risto97/verilator
Verilator open-source SystemVerilog simulator and lint system
Language:C++0 0
Risto97/verilator_cmake_issue
Language:Verilog1 0
Risto97/verilog-i2c
Verilog I2C interface for FPGA implementation
Language:Verilog1 0
Risto97/verisc_as_dep
Example project of using VeriSC as a dependency in a CMake project, the VeriSC will build itself and check the version, update if needed
Language:CMake1 0
Risto97/xmake-docs
The xmake online documentation site
Language:HTML0 0