/chisel_test

A simple Chisel test project for myself to learn Chisel and FPGA.

Primary LanguageScala

Chisel Test

A simple project for myself to learn Chisel and FPGA.

Supports TinyFPGA BX and OrangeCrab boards.

Build tool are required separately.

Usage

To build a bitstream for a specific top module, simply make with TOP_MODULE. Where BOARD can be tinyfpgabx or orangecrab.

make BOARD=... TOP_MODULE=...

For TinyFPGA BX, to program bitstream, connect device to USB then use prog task.

make BOARD=tinyfpgabx TOP_MODULE=... prog

For OrangeCrab, to dfu bitstream, connect device to USB, then use dfu task.

make BOARD=orangecrab TOP_MODULE=... dfu