openhwgroup/cv32e40x
4 stage, in-order, compute RISC-V core based on the CV32E40P
SystemVerilogNOASSERTION
Stargazers
- aabbdevParis, France
- AshLeungYinChuan
- blank-lys
- BOBBYWY
- combinatorylogic
- ejpcmacCaen, France
- gapryMacau, Macao
- gokoukotoriJapan
- halfdan-dolvaSilicon Labs
- hengdaidi
- javacpplyh
- jm4rtinEM Microelectronic-US Inc.
- jmcph4@sigp
- jonancm
- kedziornoPL
- lc-mayChina
- liweinanBeijing
- ljungmarkwww
- mfkiwl
- Milo-D9eSec
- mukulkant-mikemighty
- ninfueng@tamukohlaboratory
- nsauzedeインテル
- OceanS2000Beijing, China
- ombhilare999@BeagleWire @PyFive-RISC-V @SRA-VJTI
- paranleeEricsson LG
- robbietoo
- ryanwoodsmall
- sagniknitrApple
- sankarbsubramani
- septs@NiceLabs
- shawnl
- shibizhaoPeking University
- silabs-oivindSilicon Labs
- xushoucai
- YangWang92