The Open-Source FPGA Foundation

Pinned Repositories

1st-CLaaS
Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications
Language:C208 16 1946
Backend
Compiler backend from packing to bitstream generation.
Language:C++7 7 74
FOEDAG
Framework Open EDA Gui
Language:C++73 17 15234
GettingStartedWithFPGAs
Content for the FPGA Primer Course offered by the OSFPGA Foundation, Redwood EDA, and VLSI System Design.
Language:TL-Verilog39 4 15
IP_Catalog
IP Catalog for Raptor.
Language:Verilog17 6 212
open-source-fpga-resource
A list of resources related to the open-source FPGA projects
431 41 147
project-ideas
An area to track open-source project ideas of interest to OSFPGA.
6 4 01
Raptor
Raptor end-to-end FPGA Compiler and GUI
Language:Verilog90 9 6225
RTL_Benchmark
This repository contains the benchmarks.
Language:Verilog7 3 67
Virtual-FPGA-Lab
This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.
Language:TL-Verilog228 8 235

The Open-Source FPGA Foundation's Repositories

os-fpga/open-source-fpga-resource
A list of resources related to the open-source FPGA projects
431 41 147
os-fpga/GettingStartedWithFPGAs
Content for the FPGA Primer Course offered by the OSFPGA Foundation, Redwood EDA, and VLSI System Design.
Language:TL-Verilog39 4 15
os-fpga/project-ideas
An area to track open-source project ideas of interest to OSFPGA.
6 4 01
os-fpga/logger_rs
Language:C++1 2 00
os-fpga/liteeth
Small footprint and configurable Ethernet core
Language:Python1 0
os-fpga/litespi
Small footprint and configurable SPI core
Language:Python1 0
os-fpga/litex
Build your hardware, easily!
Language:C1
os-fpga/LiteX_Reference_Design_rs
System Level Design created using LiteX infra, target platform are ARTY A7, basys 3 fpga
Language:Verilog
os-fpga/micro_benchmark_designs
Language:Verilog