Issues
- 0
Parallella Embedded (P1602) out of stock
#31 opened by kaklik - 0
parallella_layout.brd 404 Error
#34 opened by matt0930 - 0
- 0
Missing buddy_reference.md
#32 opened by jasondavies - 2
the IP address of P1601
#30 opened by yyddddmw - 1
Pinouts USB?
#29 opened by ballsystemlord - 0
Porcupine elink connector validation
#24 opened by aolofsson - 0
Increase elink data rate (FPGA-->epiphany)
#20 opened by aolofsson - 0
HDMI not working with new elink design
#13 opened by aolofsson - 4
corrupted clock settings
#8 opened by shodruky-rhyammer - 2
Release refactored elink project
#14 opened by aolofsson - 1
- 1
Increase elink data rate (epiphany-->FPGA)
#21 opened by aolofsson - 4
Porcupine PCB Printing Issue
#27 opened by Nobis99 - 4
Split out RTL files to separate repo
#11 opened by olofk - 1
Clean up AXI slave interface
#16 opened by aolofsson - 1
Clean up AXI maxi interface
#15 opened by aolofsson - 10
A clean "no-ip" version of elink
#18 opened by aolofsson - 1
- 1
Synthesis fails
#26 opened by olajep - 1
fifo_async_emesh is missing
#25 opened by olofk - 4
testbench for emmu is out of sync with RTL
#12 opened by olofk - 1
Improve math test environment and vectors
#22 opened by aolofsson - 5
- 1
"Core" misspelled in g0 and g1 docs
#1 opened by EButlerIV - 1
Board overheating
#2 opened by aolofsson - 1
Board failures with non-conforming USB hubs
#3 opened by aolofsson - 1
Weak uUSB and uHDMI connectors
#4 opened by aolofsson - 2
- 2
Custom path in system.xmp
#6 opened by kartharer - 2
Headless 7020 Epiphany 16 not loading
#5 opened by kartharer