riscv/riscv-aia

Issues

• A question of Interrupt filtering？

  #105 opened 2 months ago by ZeyueShen
  2

• S-level external interrupts default priority order (when handled in M-mode)

  #110 opened a month ago by evgeniy-paltsev
  1

• Questions about mvip

  #106 opened a month ago by Baixyzz
  3

• S-level external interrupts priority value when handled in M-mode

  #109 opened a month ago by evgeniy-paltsev
  1

• Can we delivery external interrupt connected to APLIC to a virtual hart whose interrupt file is located in Memory (MRIF)

  #107 opened a month ago by Steven-Li-Xiaogang
  3

• When vsiselect is in the range of 0x070–0x0FF, does access to vsireg2 belong to IMSIC states?

  #103 opened 2 months ago by Jahhow
  1

• Supervisor-level iprio configurability

  #102 opened 2 months ago by evgeniy-paltsev
  3

• Limitation access to the APLIC machine-level interrupt domain without PMP entries

  #100 opened 2 months ago by nonufrienko
  2

• Question about the condition of response for interrupt injected by hvictl

  #104 opened 2 months ago by myx922
  6

• Is hstatus.VGEIN used to index guest interupt files when accessing iCSR via VSISELECT/VSIREG window?

  #99 opened 2 months ago by zengderui
  2

• mvien/mip behavior

  #101 opened 2 months ago by jiahzhang
  1

• Can AIA only support 2047 EIID maximum?

  #94 opened 2 months ago by zhangdujiao
  3

• What's the value of stopi.IPRIO when using mvien and mvip to generate a SEI that traps to S mode?

  #91 opened 5 months ago by zhuotianshu
  5

• Question of a machine-level trap handler described in aia spec(5.2.2)

  #96 opened 4 months ago by ZeyueShen
  2

• Can hvictl inject an interrupt with IID=0 and IPRIO=0?

  #98 opened 3 months ago by zhuotianshu
  1

• If S external interrupt is injected to S with mvien & mvip than there is no clear rule to determine its priority

  #97 opened 3 months ago by evgeniy-paltsev
  2

• AIA: contradiction in bits 12:0 of hvip description

  #93 opened 3 months ago by evgeniy-paltsev
  2

• mtopi/stopi values ​​when mnstatus.NMIE=0

  #95 opened 4 months ago by nonufrienko
  2

• Can different interrupt sources be directed to different die in one APLIC?

  #92 opened 4 months ago by zhangdujiao
  1

• How to distinguish IPI and external interrupt if using IMSIC to accomplish IPI

  #89 opened 5 months ago by zhangdujiao
  2

• Should virtual supervisor domain be implemented in APLIC while hypervisor (virtual supervisor) is supported?

  #90 opened 5 months ago by Steven-Li-Xiaogang
  1

• What's the purpose of virtual interrupts?

  #67 opened a year ago by zhuotianshu
  3

• How to define NMI in AIA architecture?

  #85 opened 6 months ago by zhangdujiao
  1

• Does mstateen0[58]=0 take precedence over hstatus.VGEIN=0?

  #86 opened 6 months ago by Jahhow
  1

• Is there any requirement about the speed of arbitration or the interrupt infomation transfer?

  #82 opened 7 months ago by zhuotianshu
  5

• Clarify "Access control by the state-enable CSRs"

  #84 opened 7 months ago by wissygh
  2

• ASCII doc broken text

  #83 opened 7 months ago by albert-azcarate
  3

• Optional setting of interrupt pending when writing sourcecfg?

  #80 opened 7 months ago by kdockser
  1

• Conflict register model between MVIEN and HVIEN

  #78 opened 9 months ago by zetalog
  1

• MVIP.STIP

  #79 opened 8 months ago by jiahzhang
  2

• mvien[1]

  #77 opened 9 months ago by Mei-x-l
  1

• Conflicting sentences about mvip[9] and mip[9] when mvien[9]=0

  #64 opened a year ago by YenHaoChen
  4

• Are priorities of virtual interrupts configurable to HS-mode through iprio array?

  #71 opened 10 months ago by YenHaoChen
  3

• Question regarding mvip[9]

  #62 opened a year ago by gzaitd
  2

• Can interrupt identity >63 cause a trap in non virtualized mode?

  #72 opened 10 months ago by zhuotianshu
  2

• Why the priority of the third candidate of vstopi is 256?

  #74 opened 10 months ago by zhuotianshu
  7

• Does SEI in VS mode use default priority?

  #73 opened 10 months ago by zhuotianshu
  2

• About the "sticky" property of sip.

  #70 opened 10 months ago by zhuotianshu
  1

• local interrupts in sip and vsip may be cleared when other CSRs change

  #76 opened 10 months ago by jhauser-us
  0

• Does interrupts have priority when aplic forward through MSI? How to send MSI if 1023 interrupts arrive simultaneously

  #60 opened 10 months ago by vang2333
  1

• About the possibility of IOMMU examining ie bit before sending notify MSI.

  #75 opened 10 months ago by zhuotianshu
  0

• Behavior of accessing vsireg at vsiselect addresses 0x30~0x3f from HS-mode.

  #66 opened 10 months ago by YenHaoChen
  2

• How to distinguish APLIC interrupt in MSI mode?

  #68 opened 10 months ago by X547
  4

• Add a comment calling out the software-writable bit behind mip.SEIP

  #65 opened a year ago by jhauser-us
  0

• Possible typos in table 6.1

  #63 opened a year ago by jrahmeh
  2

• How hvictl affect vstopi? Is every value legal?

  #61 opened a year ago by n1240549
  1

• vstopi behavior

  #59 opened a year ago by umcann123
  4

• APLIC Level sensitive interrupts in MSI mode

  #58 opened a year ago by gzaitd
  2

• IMSIC interrupt file eidelivery register affects only external interrupt in *ip CSR

  #56 opened a year ago by jhauser-us
  0

• APLIC's domaincfg.IE bit and idelivery registers affect only interrupt delivery

  #57 opened a year ago by jhauser-us
  0