CHERI instruction access fault should be CHERI instruction fetch fault

Question

CHERI instruction access fault should be CHERI instruction fetch fault

Closed this issue 3 months ago · 2 comments

The term "access fault" has a very specific meaning within RISC-V, which does not apply here.

Answer 1 · 2024-09-25T13:08:00.000Z

what's wrong with CHERI instruction access fault as a name? It's in line with the normal access fault, why doesn't it apply?

Answer 2 · 2024-09-25T13:22:45.000Z

Because "access fault" is about the bus coming back with an error (e.g. accessing a non-existent physical address) in RISC-V terminology. Capability faults happen before we've even translated the address, let alone sent requests out on the bus.