Pinned Repositories
nngen
NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
Pyverilog
Python-based Hardware Design Processing Toolkit for Verilog HDL
veriloggen
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
cachesim
Cache system simulator for C++ and Verilog VPI.
commandline_settings
A Toolkit for Setting Up Command-line Environments on Linux/BSD/Mac
jitter-clock
Jitter clock signal generator for Verilog HDL simulations
netrace-cpp
Netrace in C++.
pyminisat
Python MiniSat Wrapper
shtaxxx's Repositories
shtaxxx/cachesim
Cache system simulator for C++ and Verilog VPI.
shtaxxx/pyminisat
Python MiniSat Wrapper
shtaxxx/commandline_settings
A Toolkit for Setting Up Command-line Environments on Linux/BSD/Mac
shtaxxx/jitter-clock
Jitter clock signal generator for Verilog HDL simulations
shtaxxx/netrace-cpp
Netrace in C++.
shtaxxx/perceptron
Introduction to implementation of perceptron by using python numpy.
shtaxxx/preload_hook
Function call hooking by using LD_PRELOAD and dlopen
shtaxxx/vpi-sample
Verilog HDL VPI sample code
shtaxxx/awesome-hardware-tools
List of awesome open source hardware tools
shtaxxx/cmabuf
Linux device driver for dma buffer using dma_alloc_coherent()
shtaxxx/ctypes_test
Test for using C/C++ method from Python with ctypes
shtaxxx/flymake-verilog
emacs flymake settings for Verilog HDL. Thanks for sabottenda. http://d.hatena.ne.jp/sabottenda/20121029/1351523808
shtaxxx/gemm_hls
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
shtaxxx/meigenbot
Twitter bot script written in ruby to tweet a selected sentence from the mixi community board.
shtaxxx/portforwarding
Ruby Script to manage multiple SSH port-forwarding sessions for MacOS X and Linux
shtaxxx/screenrc-bash
.screenrc for bash users
shtaxxx/udmabuf
User space mappable dma buffer device driver for Linux.
shtaxxx/x10-nocsim
Parallelized On-chip Network Simulator by X10