syedarafia13
Undergrad | Research Intern at MERL-UIT| RTL Designer | AWS-FPGA
Usman Institute of TechnologyKarachi, Pakistan
Pinned Repositories
5-STAGE-PIPELINING-RV32I
aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
core-v-mcu
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
RISCV-CORE-FPGA
This repository contains RISCV (RV32I) Single Cycle Processor RTL design in SystemVerilog and Testbench in C++ for fpga.
RISCV-RV32I-CORE
RISCV-RV32I-LOGISIM
RISCV is an open source software.
scalar-unit
system-verilog
verilator
Verilator open-source SystemVerilog simulator and lint system
verilog-practice
syedarafia13's Repositories
syedarafia13/RISCV-RV32I-LOGISIM
RISCV is an open source software.
syedarafia13/5-STAGE-PIPELINING-RV32I
syedarafia13/aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
syedarafia13/RISCV-CORE-FPGA
This repository contains RISCV (RV32I) Single Cycle Processor RTL design in SystemVerilog and Testbench in C++ for fpga.
syedarafia13/RISCV-RV32I-CORE
syedarafia13/scalar-unit
syedarafia13/system-verilog
syedarafia13/verilator
Verilator open-source SystemVerilog simulator and lint system
syedarafia13/verilog-practice
syedarafia13/core-v-mcu
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
syedarafia13/FYP-MultiCore-SoC
syedarafia13/ideas
Random ideas and interesting ideas for things we hope to eventually do.
syedarafia13/Lushay-Labs-Stepper-Motor-Controller
Lushay Labs Project 2023: Stepper Motor Controller using Tang Nano 9K FPGA
syedarafia13/Nova1
Open source RISCV-based embedded AI reference platform
syedarafia13/openpiton
The OpenPiton Platform
syedarafia13/python
syedarafia13/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
syedarafia13/syedarafia13
syedarafia13/to-aws