tebina's Stars
slint-ui/slint
Slint is a declarative GUI toolkit to build native user interfaces for Rust, C++, or JavaScript apps.
cars-lab-repo/CycPUF
Cyclic Physical Unclonable Function
secworks/sha256
Hardware implementation of the SHA-256 cryptographic hash function
osafune/sha256_core
hadipourh/CryptoHDL
A list of VHDL codes implementing cryptographic algorithms
aolofsson/awesome-semiconductor-startups
List of awesome semiconductor startups
MahmouodMagdi/Clock-Domain-Crossing-Synchronizers
Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference for understanding and implementing robust clock domain crossing solutions in digital systems.
siliconcompiler/siliconcompiler
Modular hardware build system
muhammedkocaoglu/SystemVerilog-Tutorials
SystemVerilog derslerinde yazdığım kodları içermektedir.
pantor/inja
A Template Engine for Modern C++
Crimsonninja/senior_design_puf
Repository to store all design and testbench files for Senior Design
ellisonleao/gruvbox.nvim
Lua port of the most famous vim colorscheme
verilator/example-systemverilog
gpakosz/.tmux
🇫🇷 Oh my tmux! My self-contained, pretty & versatile tmux configuration made with ❤️
mikeroyal/Unreal-Engine-Guide
Unreal Engine 5 Guide. Learn to develop games for Windows, Linux, macOS, iOS, Android, Xbox Series X|S, PlayStation 5, Nintendo Switch.
craftzdog/dotfiles-public
My personal dotfiles
aolofsson/awesome-opensource-hardware
List of awesome open source hardware tools, generators, and reusable designs
emse-sas-lab/SCAbox-ip
SCAbox's sensors, storage and target IP cores
inria-emeraude/syfala
A faust-to-fpga compiler toolchain
Ledger-Donjon/lascar
Ledger's Advanced Side-Channel Analysis Repository
mattvenn/simulate-gate
Project 1.1 Simulate a Skywater 130nm standard cell using ngspice
pest-parser/pest
The Elegant Parser
abhimanyu003/qubit
A handy calculator, based on Rust and WebAssembly.
emilk/egui
egui: an easy-to-use immediate mode GUI in Rust that runs on both web and native
mflowgen/freepdk-45nm
ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
The-OpenROAD-Project/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
adamchristiansen/minimal-vivado-template
A template for Xilinx Vivado projects that fits cleanly under version control
lark-parser/lark
Lark is a parsing toolkit for Python, built with a focus on ergonomics, performance and modularity.
Lucaz97/ALICE
heitzmann/gdstk
Gdstk (GDSII Tool Kit) is a C++/Python library for creation and manipulation of GDSII and OASIS files.