asic-verification

abdelazeem201/Systolic-array-implementation-in-RTL-for-TPU

IC implementation of Systolic Array for TPU

kumarrishav14/AXI

VIP for AXI Protocol

wyvernSemi/vproc

Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments

abdelazeem201/Design-and-ASIC-Implementation-of-32-Point-FFT-Processor

I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has been proposed for the first time. It saves a complex adder compared with the typical radix-2 butterfly unit. The new pipelined architecture can be built using the proposed processing element. The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of adders required in the conventional pipelined FFT designs. In order to produce the output sequence in normal order, we also present a bit reverser, which can achieve a 50% reduction in memory usage.

Lampro-Mellon/Quasar

Quasar 2.0: Chisel equivalent of SweRV-EL2

m-kru/go-hdl

Hdl is a tool for easing the work with hardware description languages.

SalomeDevkule7/Neural-Network-Layer-Generator

Application Specific Integrated Circuit(ASIC)

abdelazeem201/LEON2

The LEON2 is a synthesisable VHDL model of a 32-bit processor conforming to the IEEE-1754 (SPARC V8) architecture.

Aperture-Electronic/Indago.NET

.NET Scripting Engine for Cadence(R) Indago(R) Interactive Verification Enviroment

dhruvildarji/MIPS

Made Million Instruction Per Second Processor

kumarrishav14/I2C

VIP for I2C

williaml33moore/bathtub

BDD Gherkin implementation in native SystemVerilog, based on UVM.

Datum-Technology-Corporation/mio_demo

Moore.io Demo Project

jpm18/VLSI-Laboratory-NIT-Rourkela

Laboraory manuals and Discussion

Prithvish04/optimized_bnn_asic

High-Performance Binary Neural Networks for MNIST Classification: From Software to ASIC

asicverif/sva

A repo for small SVA examples

asicverif/tcl

TCL examples from the Clif Flynt's classic

Pritam-Sethuraman/ALU