sdram
There are 41 repositories under sdram topic.
ultraembedded/cores
Various HDL (Verilog) IP Cores
nullobject/sdram-fpga
A FPGA core for a simple SDRAM controller.
1a2m3/SPD-Reader-Writer
SPD Reader & Writer with Software Write Protection capabilities supporting Arduino and SMBus
hdl-util/sdram-controller
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
jasonsbeer/Amiga-N2630
A re-imagining of the Amiga A2630 processor card.
ghent360/riscvOnColorlight-5A-75B
RISC-V soft core running on Colorlight 5B-74B.
AngeloJacobo/FPGA_SDRAM_Controller
SDRAM controller optimized to a memory bandwidth of 316MB/s
iliasam/stm32f429_vga_examples
Code examples of using STM32F429 for generating VGA image.
machdyne/kuchen
Kuchen Computer
qubeck78/tangerineA7_200
RiscV based SOC for Qmtech Artix A7-200 board. Includes nekoRv: RISC-V 32 IM Zicsr core. And yes, it runs DOOM :)
perehinik/SDRAM_Controller
Verilog SDR SDRAM controller for FPGA Xilinx and Lattice
andrempmattos/harsh-payload
Harsh Environment CubeSat Payload designed to evaluate three different manufacturing nodes SDR SDRAM technologies under space radiation conditions. It was developed for the FloripaSat-2 CubeSat mission.
oscc-ip/sdram
An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different manufacturers and models through parameter configuration.
har-in-air/SIPEED_TANG_PRIMER
Projects using the Sipeed Tang Primer FPGA development board
MinatsuT/CYC1000_SDRAM
A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)
Arkowski24/sdram-controller
Simple SDRAM Controller for DE10-Lite.
yigitbektasgursoy/SDRAM_Verilog
Verilog HDL implementation of SDRAM controller and SDRAM model
cw1997/SDRAM-Controller
SDRAM Controller, written by SystemVerilogHDL, supporting passing parameters including CAS Latency(CL), burst mode enable and burst length, using writing and reading control signal as request/response handshake bus protocol
egk696/EDAC_SDRAM_Controller
Mitigating Single-Event Upsets in COTS SDRAM using an EDAC SDRAM Controller
jakubcabal/sdram-tester-fpga
SDRAM Tester implemented in FPGA
agg23/sdram-controller
A HDL SDRAM controller designed for retro hardware and FPGAs
ShwetaKiranTotla/Micro-processor-Design-Verification
Design Verification of Flash, UART, and SDRAM controller for a 32 bit embedded RISC microprocessor using cocotb.
redchenjs/spd-eeprom
A simple command line tool for reading and writing AT24/EE1004 SPD EEPROMs.
RichardPar/SDRAM_Controller_Verilog
This SDRAM controller is for MT48LC32M16 SDRAM. This module was designed under the assumption that the clock rate is 100MHz.
vitalych/fpga-gameoflife
A game-of-life implementation for the FPGA4U board, with SDRAM, RS232 UART, and VGA controllers
fredrequin/verilator_helpers
C++ objects to help verilator simulations
abelykh0/stm32f746-sdram
Using SDRAM on a WaveShare STM32F746IGT6 board
armleo/sdram_controller
SDR SDRAM Controller with Avalon-MM bus; [Bugged, deprecated]
Keidan/STM32F7_MEMORY_MAPPED_SDRAM
(LGPL) Demonstration of how to use a memory-mapped SDRAM through the Flexible Memory Controller
teekamkhandelwal/SRAM_Controller
The Enhanced SRAM Controller handles secure, efficient memory operations with features like burst mode, error correction, power-saving, and clock domain crossing. It’s perfect for applications requiring robust and reliable memory handling.
kitune-san/KFSDRAM
Simple SDRAM controller written in SystemVerilog
oskarwires/sdram_controller
High-Speed SystemVerilog SDRAM Controller
yasnakateb/SdramController
🛠 A SDRAM controller in Verilog HDL