verilog-code

pub-ips

CMOS_3_To_8_Decoder_VLSI

pseudo_random_sequence_generator

FSM-Sequence-Detector-using-Verilog

FSM: Sequence Detector using Verilog HDL

4-bit-Full-Adder-using-Verilog-HDL

Verilog code and testbench for 4-bit full adder

CarPark_Verilog

This project is using for illustrating on making the circuit on Xillin's BASYS3 from AMD and Verilog Language on Vivado, on the scope of car parking system

VerilogCourse

What I learned in the Verilog course includes the assignments I completed and laboratory files.

EV21-Processor

Verilog RISC Processor Design

Verilog

Verilog Programs

MATRIX-INVERSE-VERILOG-nxn

This repository contains a Verilog implementation of matrix inversion using the Gaussian-Jordan elimination method. The module supports fixed-point arithmetic for better numerical precision and is parameterized to handle different matrix sizes and bit widths.

8BitMicroFPGA

This repository contains all the necessary Verilog code and supporting files to synthesize the 8-bit soft-core processor on an FPGA. The code is well-commented, following best practices in digital design to ensure clarity and maintainability.

all_verilog

I am trying to develop my skills through daily practice and consistency.

HDLbits-practice-solution

This is a repository containing my solutions to the problem statements given on HDLBits website.

estudos_verilog

Exemplos feito em verilog para estudos

My-Custom-CPU-ISA-Assembly

A small CPU / ISA and a testbench that displays its instructions' equivalent in assembly&machine language.

verilog-experiments

:space_invader: My studies with Verilog and notions of digital systems.

VerilogBasics

Basics of Verilog implementation

MIPS32

Design of 32-bit MIPS Processor

Sequential-Logic-Circuits

Verilog design and testbench files for Flip Flop, Counters, RAM, FIFO, Shift Registers and other sequential logic circuits

Digital-System-Design-Verilog-Implementation

Digital System Design Verilog Implementation

Field_Programmable_Gate_Array_FPGA_Course

FPGA 2022/1400, Fall CSE & IT Dept., Shiraz University

verilog-code

These are verilog codes for the different ICs

Verilog-Codes

Verilog

MIPS_PROCESSOR

32-bits MIPS Processor with 5-stage pipeline

CMP305-introduction-Verilog

introduction to Verilog in Integrated Circuit Design And VLSI technology

Asynchronous-Interface

The asynchronous interface is spercifically designed for scalable parallel datapaths.

ece497

ECE 497 - Special Project Research

sensores-verilog

Se hace una recopilación de los sensores utilizados para el proyecto de una casa domotica. Compilado en ISE Design 14.6 y Simulado en ISim.

maquina-expendedora

Se hace una maquina expendedora a partir de un diagrama de estados para conocer el proceso de venta de 3 gaseosas distintas en las que se tiene en cuenta el sistema de devolución de dinero.

vlsi-lab-tasks

Codes performed in labs using Xilinx ISE 14.7

iovcc.github.io

An International Obfuscated *HDL Code Contest (Why Verilog? For the name to be good: IOVCC)

food-machine

Projeto de uma máquina de lanche desenvolvido como atividade final da disciplina Circuitos Lógicos II.

verilog

This is my HDL code page which I started to showcase my coding skills and documenting my work for future reference. I am pursuing my master's at Texas A&M University (2019-21). I am looking forward to be a verification engineer. If you have any doubts you are welcomed to email me @ arunraja08@gmail.com

verilog-labs

Pin-point analysis of the questions given in labs using FPGA and ASIC design.

hdlang-ex

Hardware Description Language(HDL) based codes using Verilog & VHDL for reference.