xilinx-zynq
There are 41 repositories under xilinx-zynq topic.
MeowLucian/SDR_Matlab_OFDM_802.11a
:satellite: Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz
MeowLucian/SDR_Matlab_OFDM_802.11n
:satellite: Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz
MeowLucian/SDR_FM_Radio
:radio: Using Software Designed Radio to transmit & receive FM signal
MeowLucian/SDR_Matlab_LTE
:satellite: Using Software Designed Radio to transmit LTE downlink signals at 2.4 GHz
MeowLucian/SDR_Matlab_OFDM_802.11a_16QAM
:satellite: Using Software Designed Radio to transmit OFDM 16QAM signals at 5 GHz
matthieu-labas/docker-petalinux
Docker image generation for generic Petalinux
chungae9ri/slos
Simple Light OS source repository
carlesfernandez/docker-petalinux
Docker image generation for Xilinx Petalinux Tools and Vivado
DYGV/HLS_FFT
Design of High-Level Synthesis of Xilinx FFT IP core via FFT library
systemviewinc/visual-system-integrator
Visual System Integrator - Accelerate your embedded development
wubinary/two_stream_soc
SOC of two_stream action recognition on ZCU102
ms0488638/PYNQ_Burst_Test
This is a design for the test of AXI_HP on PYNQ-Z1 (as well as Z2, maybe)
AmirhoseinMasoumi/Zynq-Core-Board
Zynq Ultrascale+ Core Board
t-kuha/ultra96-unified
Ultra96 (v1 & v2) projects
urbanij/DDFS
Direct digital frequency synthesizer in Verilog and VHDL.
Xilover/Heterogeneous-Computing
Comprehensive open-source curriculum for mastering heterogeneous computing architectures and optimization.
dwij2812/UART-Spectrum-Analyzer-for-Serial-Devices
The following Script can be used to generate certain mathematical functions on a micro controller or FPGA Device connected in serial based on the configuration selected by the the user and collect realtime data of the signal as generated by the device for spectrum analysis.
JoseCVieira/JacobiMethod-HwSw-Architecture
Implementation of Jacobi method in a co-processing architecture Hw/Sw using FPGA (Field Programmable Gate Array) ZYBO Zynq-7000 Development Board for Co-Project Hw/Sw course.
kevinhikaruevans/blackboard-esp32
Embedded library for the on-board ESP32 on the RealDigital Blackboard
sefaburakokcu/finn-quantized-classification
Low-Precision Neural Networks for Classification on PYNQ with FINN
thadoe/Digital_projects_in_Verilog_SystemC
Inference Design, Behavioral simulations, and Hardware Implementation.
viktor-nikolov/ILI9488-Xilinx
ILI9488 TFT SPI display library for Xilinx SoC and FPGA
wurmmi/fm-radio
Master thesis project - Comparing a FM Radio implementation in VHDL versus high-level synthesis (HLS).
Xilover/IoT-and-Edge-Computing
Hands-on learning experience in IoT, edge computing, and embedded systems using a variety of platforms such as microcontrollers (nRF, STM32, ESP32), FPGAs (Xilinx), and SoCs (Raspberry Pi, Zynq).
ArioKian/Xilinx-Zynq7000-ZynqUltraScalePlus-PS-SdCard-Drivers
Zynq-7000 and Zynq UltraScale+ PS side drivers for SdCard.
ckevar/IIR-Filter
IIR Filter for audio application
cracked-machine/poky_zynqmp_generic_test
Testing meta-xilnx/poky layers with QEMU
ddurfeeEngineer/ad9361-iiostream-loopback
example of using iio to stream data from AD9361 with a coax cable loopback
efetunca/Zynq-7000-TFTP-Server
A TFTP server running on Zynq-7000
fsiddiqui85/IPPro
The IPPro is a 16-bit signed fixed-point, five-stage balanced pipelined RISC architecture that exploits the DSP48E1 features and provides balance among performance, latency and efficient resource utilization.
gitzhangzhao/petalinux_2017.04
配置好的 petalinux 2017.04 Docker 安装环境
j-schacht/xilinx_zcu102_trustzone_demo
Tutorial and base project: TEE on AMD Zynq UltraScale+ using Arm TrustZone
kuoyaoming93/axi_uartlite_pynq
PYNQ-Z1/Z2 Compatible Python helper functions for AXI UARTLITE IP Core of Xilinx
z1skgr/reconf-Computing__HLS
High Level synthesis of data transfer in Vivado, Vivado HLS
ArioKian/Xilinx-Zynq7000-PS-SLCR-Registers-Drivers
Zynq-7000 PS side drivers for SLCR Registers.
gonzafernan/cese-mys-zynq7
Microarquitecturas y Softcores - CESE - FIUBA