/cdsAsync

cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library

Primary LanguageVerilogOtherNOASSERTION

cdsAsync

cdsAsync License

cdsAsync is an open-source asynchronous toolset & schematic library built for use with Cadence IC (virtuoso) and simulation suites. It is developed at UC Davis, and designed with customization, modularity, and automation of analysis in mind.

Documentation

Quickstart Usage
QDI Cell Design

Library Citations

  1. ASAP7: A 7-nm FinFET Predictive Process Design Kit
  2. A Designer's Guide to Asynchronous VLSI
  3. Pipelined Asynchronous Circuits
  4. GHz Asynchronous SRAM
  5. Asynchronous Crossbar with Deterministic Or Arbitrated Control
  6. Techniques for Facilitating Conversion Between Asynchronous and Synchronous Domains
  7. An Asynchronous Pipelined Lattice Structure Filter
  8. Pipelined Asynchronous Cache Design
  9. Asynchronous Techniques for System-on-Chip Design
  10. An Energy Estimation Method for Asynchronous Circuits with Application to an Asynchronous Microprocessor
  11. Resetting Asynchronous QDI Systems
  12. Resililent Design Methodology for Energy-Efficient SRAM
  13. An Asynchronous Floating-Point Multiplier

License and Citation

This library is released under a modified BSD 2-Clause license.
Please cite this repository if it helps your research.