ungultig1

Pinned Repositories

• vhdl-style-guide

  Style guide enforcement for VHDL

  Language:Python1951192942

• hdl_checker

  Repurposing existing HDL tools to help writing better code

  Language:Python196177623

• vscode-terosHDL

  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

  Language:VHDL5822447946

• vhdl-linter

  Language:Emacs Lisp2861847

ungultig1's Repositories