yuhao127jl's Stars
nonstriater/Learn-Algorithms
算法学习笔记
nvdla/hw
RTL, Cmodel, and testbench for NVDLA
liangkangnan/tinyriscv
A very simple and easy to understand RISC-V core.
riscvarchive/riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
ultraembedded/cores
Various HDL (Verilog) IP Cores
open-sdr/openwifi-hw
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware
adki/AMBA_AXI_AHB_APB
AMBA bus lecture material
jhshi/openofdm
Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
nvdla/doc
Documentation for NVDLA.
GodelMachine/AHB2
AMBA AHB 2.0 VIP in SystemVerilog UVM
SI-RISCV/hbird-e-sdk
Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
freecores/8051
8051 core
aiminickwong/H264
H264视频解码verilog实现
freecores/dma_ahb
AHB DMA 32 / 64 bits
freecores/uart16550
UART 16550 core
freecores/turbo8051
turbo 8051
hanysalah/uart2bustestbench
UVM Verification IP to uart2bus IP.
MushroomZQ/RISC_VERIF_DEMO_0
a very simple risc_cpu verification demo with uvm
tishi43/h264_decoder
freecores/nova
H.264/AVC Baseline Decoder
nelsoncsc/FFT
Hardware implementation of a Fixed Point Recursive Forward and Inverse FFT algorithm
freecores/reed_solomon_decoder
Reed Solomon Decoder (204,188)
ziruizhu/ofdm
Toy OFDM Communication System with FPGA
freecores/bluespec-80211atransmitter
Bluespec 802.11a Transmitter
saikat27/riscvofdm
An OFDM Accelerator for RISC-V based Processors
AnLingzhi/h264enc
freecores/djpeg
No description
freecores/oc-h264-encoder
OC - H.264 Encoder SoC
freecores/pci_blue_interface
No description
zhuyh128/opene902
OpenXuantie - OpenE902 Core