yyllff11

yyllff11's Stars

• pnnl/OpenCGRA

  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.

  Language:Verilog13322

• akashlevy/NEM-Relay-CGRA

  Jade CGRA using NEM relay interconnect fabric. Related repositories: NEM-Relay-CGRA-Flow, NEM-Relay-CAD

  Language:Verilog83

• dillonhuff/CGRA_verilog_mirror

  Mirror of CGRA verilog generation on kiwi

  Language:Verilog41

• zhang-xun/OpenCGRA

  Project repo for the coarse-grained reconfigurable architecture

  51

• mnnuahg/StamicCGRA

  A static dataflow CGRA with dynamic dataflow execution capability

  Language:Verilog101

• gary0501/traditional-CGRA

  my ungraduate project, a traditional CGRA with 3x3 PEs

  Language:Verilog82

• ChayCai/HierCGRA

  HierCGRA: An Open-Source Framework for Large-Scale CGRA with Hierarchical Modeling and Automated Exploration

  Language:Verilog113

• tancheng/VectorCGRA

  CGRA framework with vectorization support.

  Language:Verilog189

• lesc-ufv/cgra-routing

  SForum 2020 : "A Run-time Hardware Routing Implementation for CGRA Overlays" code and data.

  Language:Verilog111

• yasnakateb/CGRAs

  Coarse Grained Reconfigurable Arrays with Chisel3

  Language:Scala12

• esl-epfl/OpenEdgeCGRA

  An Open-Hardware CGRA for accelerated computation on the edge.

  Language:Python72