FvTao's Stars
RVC-Boss/GPT-SoVITS
1 min voice data can also be used to train a good TTS model! (few shot voice cloning)
vosen/ZLUDA
CUDA on non-NVIDIA GPUs
ikarus23/MifareClassicTool
An Android NFC app for reading, writing, analyzing, etc. MIFARE Classic RFID tags.
YosysHQ/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
foxsen/archbase
教科书《计算机体系结构基础》（胡伟武等，第三版）的开源版本
alexforencich/verilog-axi
Verilog AXI components for FPGA implementation
MadMaxChow/VLOOK
VLOOK™ 是优雅好用的 Typora/Markdown 主题包和增强插件。 VLOOK™ is an elegant and practical theme package × enhancement plugin for Typora/Markdown.
ZipCPU/zipcpu
A small, light weight, RISC CPU soft core
olofk/fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
madnight/githut
Github Language Statistics
NJU-ProjectN/nemu
NJU EMUlator, a full system x86/mips32/riscv32/riscv64 emulator for teaching
nightmare-space/vscode_for_android
Implementation of the VS Code editor natively on Android.
kaitoukito/Computer-Science-Textbooks
Collect some CS textbooks for learning.
sudhamshu091/32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
WangXuan95/BSV_Tutorial_cn
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
lipengzhou/typora-theme-auto-numbering
Typora 主题自动编号
YTEC-info/CH341A-Softwares
CH341A Softwares (Windows, Linux, Mac and Android)
Nic30/hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
adamgallas/fpga_accelerator_yolov3tiny
WangXuan95/FPGA-DDR-SDRAM
An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
mczerski/SD-card-controller
WISHBONE SD Card Controller IP Core
arch-simulator-sig/advanced-computer-architecture
体系结构研讨 + ysyx高阶大纲 (WIP
adibis/DDR2_Controller
DDR2 memory controller written in Verilog
Kelmory/BUAA-Thesis-BWE
北航本科生毕业设计论文模板。BUAA dissertation template of undergraduate.
oprecomp/DDR4_controller
WangXuan95/FPGA-HDMI
FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
chumingqian/Model_Compression_For_YOLOV3-V4
In this repository using the sparse training, group channel pruning and knowledge distilling for YOLOV4,
nelsonjchen/espresso-logic-minimizer
This is just a copy so it won't get lost to the sands of time or a deletionist Wikipedia editor in the Wikipedia article on the Expresso Logic Minimizer.
devindang/openip-hdl
Open IP in Hardware Description Language.
pku-liang/Cement
A hardware design framework with a timing-deterministic, Rust-embedded HDL and the compilation flow.