Imellal's Stars
tensorflow/tensorflow
An Open Source Machine Learning Framework for Everyone
freemocap/freemocap
Free Motion Capture for Everyone 💀✨
Xilinx/PYNQ
Python Productivity for ZYNQ
Xilinx/Vitis-Tutorials
Vitis In-Depth Tutorials
os-fpga/Virtual-FPGA-Lab
This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.
lakshmi-sathi/avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
IGITUGraz/LSNN-official
Long short-term memory Spiking Neural Networks
xupgit/FPGA-Design-Flow-using-Vivado
This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
stevehoover/RISC-V_MYTH_Workshop
Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop
mathworks/HDL-Coder-Self-Guided-Tutorial
Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.
Xilinx/ResNet50-PYNQ
Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
xupgit/Advanced-Embedded-System-Design-Flow-on-Zynq
MakarenaLabs/Common-PL-Devices-on-PYNQ
Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)
ATaylorCEngFIET/Getting-to-Know-Vivado
Source files for Getting to Know Vivado course
gianscarpe/event-based-monocular-hpe
Code for "Lifting Monocular Events to 3D Human Poses" - CVPRw 2021
atilsamancioglu/QX01-HelloQuantum
neuralmimicry/BrainHarmonics
Initial implementation utilising AARNN principles
diecaptain/kalman_mppt
mppt algorithm using kalman filter in VHDL
Imellal/RTL-workshop-Sky130-PDK
RTL Design using Verilog with Sky130 PDK
MakarenaLabs/PYNQ
Python Productivity for ZYNQ