This repository is a collection of programs written by me on BLOS lessons on BUT (VUT Brno in Czech). These programs are written in VHDL/Schematic, task description is included in each project folder when possible.
These instructions will get you a copy of the project up and running on your local machine for development and testing purposes.
To compile these projects yourself you will need Xilinx ISE 14.3 or newer with license (at least trial license). All projects are developed for Nexys3 development board from Digilent Inc. with Spartan6 FPGA. Schematic of this board, reference manual and pin map (ucf file) are included in this repository.
This project is licensed under the MIT License - see the LICENSE file for detail.