Judehahh

Judehahh's Stars

• LadybirdBrowser/ladybird

  Truly independent web browser

  Language:C++19.3k132336779

• zephyrproject-rtos/zephyr

  Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.

  Language:C10.4k40522.3k6.4k

• libretro/RetroArch

  Cross-platform, sophisticated frontend for the libretro API. Licensed GPLv3.

  Language:C10.1k3337.8k1.8k

• cryptpad/cryptpad

  Collaborative office suite, end-to-end encrypted and open-source.

  Language:JavaScript5.5k831.2k639

• linuxmint/cinnamon

  A Linux desktop featuring a traditional layout, built from modern technology and introducing brand new innovative features.

  Language:JavaScript4.5k1988.9k728

• open-sdr/openwifi

  open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

  Language:C3.8k134339643

• zmister2016/MrDoc

  mrdoc,online document system developed based on python. It is suitable for individuals and small teams to manage documents, wiki, knowledge and notes. 觅思文档，适合于个人和中小型团队的在线文档、知识库系统。

  Language:JavaScript2.9k48160548

• SpinalHDL/VexRiscv

  A FPGA friendly 32 bit RISC-V CPU implementation

  Language:Assembly2.4k101330406

• SecHex/SecHex-Spoofy

  C# HWID Changer 🔑︎ Disk, Guid, Mac, Gpu, Pc-Name, Win-ID, EFI, SMBIOS Spoofing [Usermode]

  Language:C#1.2k3362168

• OpenAMP/open-amp

  The main OpenAMP library implementing RPMSG, Virtio, and Remoteproc for RTOS etc

  Language:C70084164287

• STMicroelectronics/STM32CubeH7

  STM32Cube MCU Full Package for the STM32H7 series - (HAL + LL Drivers, CMSIS Core, CMSIS Device, MW libraries plus a set of Projects running on all boards provided by ST (Nucleo, Evaluation and Discovery Kits))

  Language:C49057253302

• YosysHQ/apicula

  Project Apicula 🐝: bitstream documentation for Gowin FPGAs

  Language:Verilog462368066

• bao-project/bao-hypervisor

  Bao, a Lightweight Static Partitioning Hypervisor

  Language:C3493127121

• WangXuan95/USTC-RVSoC

  An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

  Language:SystemVerilog34414871

• mit-pdos/RVirt

  RISC-V hypervisor written in Rust

  Language:Rust34319231

• diodesign/diosix

  A lightweight, secure, multiprocessor bare-metal hypervisor written in Rust for RISC-V

  Language:Rust19010912

• SpinalHDL/SpinalWorkshop

  Labs to learn SpinalHDL

  Language:Scala135101840

• tjboldt/Apple2-IO-RPi

  Apple II expansion card using a Raspberry Pi for I/O

  Language:Go118316413

• dschmenk/apple2pi

  Apple II client/server for Raspberry Pi

  Language:C112272124

• rivosinc/salus

  Risc-V hypervisor for TEE development

  Language:Rust92167625

• schoeberl/lipsi

  Lipsi: Probably the Smallest Processor in the World

  Language:Scala818318

• mricon/b4

  Tool to help with email-based patch workflows

  Language:Python6163121

• xiaowuzxc/SparrowRV

  An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.

  Language:Verilog504015

• agg23/openfpga-litex

  A RISC-V software platform, exposing Analogue Pocket capabilities in a simple way

  Language:Verilog36851

• hakkslab/FamicomPowerBoard

  A USB/composite power board replacement for the Famicom

  25705

• maximaas/Famicom-DIY

  Famicom console DIY projects

  228

• RT-Thread/rtthread-pomegranate

  Mutil-Operating Syste with RT-Thread

  Language:C18737

• revyos/mkimg-th1520

  build system image for TH1520 boards

  Language:C95010

• xmzzz/plctlab.github.io

  Technical blogs from the PLCT Lab.

  21

• motec-research/litex-coremark

  This repository provides the utility files to port CoreMark EEMBC to Litex.

  Language:C10